IP개요 |
In this paper, we propose a reconfigurable BCH (Bose-Chaudhuri-Hocquenghem) decoder for reliable SRAM operation of near-threshold voltage (NTV) application. Our reconfigurable BCH decoder stores the error correction capability value optimized for the PVT environment in the look-up table as the initial value and selects it through the result of the syndrome generator. In the NTV environment where the BER is greatly changed by PVT variation, the hardware resource waste is minimized. Estimation results shows about 42.9% reduced power in case of 2-bit correction and about 63.4% in case of 1-bit correction compared to using 4-bit fixed BCH. It is suitable for development of low power, high efficiency DSP IP and processor with high stability of operation even for large PVT variation.
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