| IP명 | Single Poly eFLASH Cell for Neuromorphic Chip | ||
|---|---|---|---|
| Category | Analog | Application | 신호처리 |
| 실설계면적 | 5㎛ X 5㎛ | 공급 전압 | 1.8, 3.3, 5V |
| IP유형 | Hard IP | 동작속도 | 128MHz |
| 검증단계 | Silicon | 참여공정 | DB180-2201 |
| IP개요 | PIM (Processor in memory) performs functions such as learning and reasoning by adding an operation function to the built-in memory array. In this study, we plan to fabricate a single poly eFlash cell without adding a mask using the DBHitek 0.18μm BCD process. Erase and program operations are done by injecting or ejecting electrons to/from FG through FN tunneling using dual program voltage of 7.5V. The single poly eFlash cell is composed of a CG capacitor as a coupling capacitor, a TG_SENSE transistor and an SG transistor that act as tunnel gate oxide and sense transistor. Since the well space between the N-well and the P-well in the DNW is maintained at 0.8 μm, it is expected that the well junction BV will be greater than 20V. Besides manufacturing single poly eFlash cell, we plan to design DC-DC converter circuit and digital control logic circuit for synapse array operation. |
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