Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 
 
Software Version and Target Device
Product Version: ISE:10.1 (Foundation Simulator) Target Family: spartan3
OS Platform: NT Target Device: xc3s1000
Project ID (random number) 6445.7072.4 Target Package: ft256
Registration ID 1B62AJFMAGS2XTU10FJW0HB5Y Target Speed: -4
Date Generated 화 10 15 10:32:10 2013
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=4
  • 13-bit subtractor=1
  • 2-bit adder=1
  • 2-bit subtractor=1
  • 32-bit adder=1
 Decoders=2
  • 1-of-4 decoder=2
 RAMs=4
  • 1024x8-bit single-port block RAM=4
 Registers=131
  • Flip-Flops=131
 		MiscellaneousStatistics
  • AGG_BONDED_IO=87
  • AGG_IO=87
  • AGG_SLICE=98
  • NUM_4_INPUT_LUT=188
  • NUM_BONDED_IOB=87
  • NUM_BUFGMUX=1
  • NUM_CYMUX=21
  • NUM_LUT_RT=10
  • NUM_RAMB16=8
  • NUM_SLICEL=98
  • NUM_SLICE_FF=68
  • NUM_XOR=23
  • Xilinx Core blk_mem_gen_v2_8, Xilinx CORE Generator 10.1_ip3=4
 		NetStatistics
  • NumNets_Active=398
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=80
  • NumNodesOfType_Active_BRAMDUMMY=32
  • NumNodesOfType_Active_CLKPIN=50
  • NumNodesOfType_Active_CNTRLPIN=101
  • NumNodesOfType_Active_DOUBLE=660
  • NumNodesOfType_Active_DUMMY=590
  • NumNodesOfType_Active_DUMMYBANK=69
  • NumNodesOfType_Active_DUMMYESC=53
  • NumNodesOfType_Active_GLOBAL=25
  • NumNodesOfType_Active_HFULLHEX=5
  • NumNodesOfType_Active_HUNIHEX=157
  • NumNodesOfType_Active_INPUT=679
  • NumNodesOfType_Active_IOBOUTPUT=53
  • NumNodesOfType_Active_OMUX=214
  • NumNodesOfType_Active_OUTPUT=258
  • NumNodesOfType_Active_PREBXBY=154
  • NumNodesOfType_Active_VFULLHEX=64
  • NumNodesOfType_Active_VLONG=5
  • NumNodesOfType_Active_VUNIHEX=240
  • NumNodesOfType_Vcc_CNTRLPIN=1
  • NumNodesOfType_Vcc_INPUT=1
  • NumNodesOfType_Vcc_PREBXBY=1
  • NumNodesOfType_Vcc_VCCOUT=2
 		SiteSummary
  • BUFGMUX=1
  • BUFGMUX_GCLKMUX=1
  • BUFGMUX_GCLK_BUFFER=1
  • IOB=87
  • IOB_INBUF=53
  • IOB_OUTBUF=34
  • IOB_PAD=87
  • RAMB16=8
  • RAMB16_RAMB16=8
  • RAMB16_RAMB16A=8
  • RAMB16_RAMB16B=4
  • SLICEL=98
  • SLICEL_C1VDD=6
  • SLICEL_C2VDD=6
  • SLICEL_CYMUXF=11
  • SLICEL_CYMUXG=10
  • SLICEL_F=92
  • SLICEL_F5MUX=10
  • SLICEL_FFX=36
  • SLICEL_FFY=32
  • SLICEL_G=96
  • SLICEL_GNDF=5
  • SLICEL_GNDG=4
  • SLICEL_XORF=12
  • SLICEL_XORG=11
 
Configuration Data
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:1]
 IOB_PAD
  • DRIVEATTRBOX=[12:34]
  • IOATTRBOX=[LVCMOS25:82] [LVCMOS33:5]
  • SLEW=[SLOW:34]
 RAMB16_RAMB16A
  • PORTA_ATTR=[2048X9:8]
  • WRITEMODEA=[NO_CHANGE:4] [WRITE_FIRST:4]
 RAMB16_RAMB16B
  • PORTB_ATTR=[2048X9:4]
  • WRITEMODEB=[WRITE_FIRST:4]
 SLICEL_FFX
  • FFX_INIT_ATTR=[INIT0:36]
  • FFX_SR_ATTR=[SRLOW:36]
  • LATCH_OR_FF=[FF:36]
  • SYNC_ATTR=[ASYNC:36]
 SLICEL_FFY
  • FFY_INIT_ATTR=[INIT0:32]
  • FFY_SR_ATTR=[SRLOW:32]
  • LATCH_OR_FF=[FF:32]
  • SYNC_ATTR=[ASYNC:32]
 
Pin Data
BUFGMUX
  • I0=1
  • O=1
  • S=1
 BUFGMUX_GCLKMUX
  • I0=1
  • OUT=1
  • S=1
 BUFGMUX_GCLK_BUFFER
  • IN=1
  • OUT=1
 IOB
  • I=53
  • O1=34
  • PAD=87
 IOB_INBUF
  • IN=53
  • OUT=53
 IOB_OUTBUF
  • IN=34
  • OUT=34
 IOB_PAD
  • PAD=87
 RAMB16
  • ADDRA10=8
  • ADDRA11=8
  • ADDRA12=8
  • ADDRA13=8
  • ADDRA3=8
  • ADDRA4=8
  • ADDRA5=8
  • ADDRA6=8
  • ADDRA7=8
  • ADDRA8=8
  • ADDRA9=8
  • ADDRB10=4
  • ADDRB11=4
  • ADDRB12=4
  • ADDRB13=4
  • ADDRB3=4
  • ADDRB4=4
  • ADDRB5=4
  • ADDRB6=4
  • ADDRB7=4
  • ADDRB8=4
  • ADDRB9=4
  • CLKA=8
  • CLKB=4
  • DIA0=8
  • DIA1=8
  • DIA2=8
  • DIA3=8
  • DIA4=8
  • DIA5=8
  • DIA6=8
  • DIA7=8
  • DIPA0=8
  • DOA0=8
  • DOA1=8
  • DOA2=8
  • DOA3=8
  • DOA4=8
  • DOA5=8
  • DOA6=8
  • DOA7=8
  • ENA=8
  • ENB=4
  • SSRA=8
  • SSRB=4
  • WEA=8
  • WEB=4
 RAMB16_RAMB16
  • ADDRA=8
  • ADDRB=4
  • DIA=8
  • DIB=4
  • DOA=8
  • DOB=4
 RAMB16_RAMB16A
  • ADDRA=8
  • ADDRA10=8
  • ADDRA11=8
  • ADDRA12=8
  • ADDRA13=8
  • ADDRA3=8
  • ADDRA4=8
  • ADDRA5=8
  • ADDRA6=8
  • ADDRA7=8
  • ADDRA8=8
  • ADDRA9=8
  • CLKA=8
  • DIA=8
  • DIA0=8
  • DIA1=8
  • DIA2=8
  • DIA3=8
  • DIA4=8
  • DIA5=8
  • DIA6=8
  • DIA7=8
  • DIPA0=8
  • DOA=8
  • DOA0=8
  • DOA1=8
  • DOA2=8
  • DOA3=8
  • DOA4=8
  • DOA5=8
  • DOA6=8
  • DOA7=8
  • ENA=8
  • SSRA=8
  • WEA=8
 RAMB16_RAMB16B
  • ADDRB=4
  • ADDRB10=4
  • ADDRB11=4
  • ADDRB12=4
  • ADDRB13=4
  • ADDRB3=4
  • ADDRB4=4
  • ADDRB5=4
  • ADDRB6=4
  • ADDRB7=4
  • ADDRB8=4
  • ADDRB9=4
  • CLKB=4
  • DIB=4
  • DOB=4
  • ENB=4
  • SSRB=4
  • WEB=4
 SLICEL
  • BX=12
  • BY=3
  • CIN=10
  • CLK=42
  • COUT=10
  • F1=92
  • F2=80
  • F3=76
  • F4=41
  • G1=96
  • G2=85
  • G3=78
  • G4=41
  • SR=5
  • X=58
  • XQ=36
  • Y=57
  • YQ=32
 SLICEL_C1VDD
  • 1=6
 SLICEL_C2VDD
  • 1=6
 SLICEL_CYMUXF
  • 0=11
  • 1=11
  • OUT=11
  • S0=11
 SLICEL_CYMUXG
  • 0=10
  • 1=10
  • OUT=10
  • S0=10
 SLICEL_F
  • A1=92
  • A2=80
  • A3=76
  • A4=41
  • D=92
 SLICEL_F5MUX
  • F=10
  • G=10
  • OUT=10
  • S0=10
 SLICEL_FFX
  • CK=36
  • D=36
  • Q=36
  • SR=2
 SLICEL_FFY
  • CK=32
  • D=32
  • Q=32
  • SR=4
 SLICEL_G
  • A1=96
  • A2=85
  • A3=78
  • A4=41
  • D=96
 SLICEL_GNDF
  • 0=5
 SLICEL_GNDG
  • 0=4
 SLICEL_XORF
  • 0=12
  • 1=12
  • O=12
 SLICEL_XORG
  • 0=11
  • 1=11
  • O=11
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1000-ft256-4 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -ise <ise_file> <fname>.ngd
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1000-ft256-4 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1000-ft256-4 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1000-ft256-4 -cm area -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
>
Software Quality
Run Statistics
ProgramRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_compxlibgui 1 1 0 0 0 0 0
bitgen 316 315 0 0 0 0 0
compxlib 1 1 0 0 0 0 0
edif2ngd 117 117 0 0 0 0 0
map 337 332 0 0 0 0 0
netgen 140 138 0 0 0 0 0
ngc2edif 1 1 0 0 0 0 0
ngcbuild 110 110 0 0 0 0 0
ngdbuild 395 393 0 0 0 0 0
par 332 328 4 0 0 0 0
trce 325 325 0 0 0 0 0
xst 575 562 0 0 0 0 0
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=Modelsim-SE Mixed
PROP_Top_Level_Module_Type=HDL PROP_PreferredLanguage=Verilog
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_COREGEN=4 FILE_UCF=1
FILE_VERILOG=5 PROP_DevDevice=xc3s1000
PROP_DevFamily=Spartan3 PROP_DevPackage=ft256
PROP_DevSpeed=-4 PROP_FitterReportFormat=HTML
PROP_UserConstraintEditorPreference=Constraints Editor Project duration(days)=0
 
Core Statistics
Core Type=blk_mem_gen_v2_8
c_addra_width=10 c_addrb_width=10 c_algorithm=0 c_byte_size=9
c_common_clk=0 c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0
c_has_ena=1 c_has_enb=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_ssra=0 c_has_ssrb=0 c_init_file_name=blk_mem_8x1024_0.mif c_load_init_file=1
c_mem_type=0 c_mux_pipeline_stages=0 c_prim_type=3 c_read_depth_a=1024
c_read_depth_b=1024 c_read_width_a=8 c_read_width_b=8 c_sim_collision_check=ALL
c_sinita_val=0 c_sinitb_val=0 c_use_byte_wea=0 c_use_byte_web=0
c_use_default_data=1 c_use_ecc=0 c_use_ramb16bwer_rst_bhv=0 c_wea_width=1
c_web_width=1 c_write_depth_a=1024 c_write_depth_b=1024 c_write_mode_a=WRITE_FIRST
c_write_mode_b=WRITE_FIRST c_write_width_a=8 c_write_width_b=8
Core Type=blk_mem_gen_v2_8
c_addra_width=10 c_addrb_width=10 c_algorithm=0 c_byte_size=9
c_common_clk=0 c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0
c_has_ena=1 c_has_enb=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_ssra=0 c_has_ssrb=0 c_init_file_name=blk_mem_8x1024_1.mif c_load_init_file=1
c_mem_type=0 c_mux_pipeline_stages=0 c_prim_type=3 c_read_depth_a=1024
c_read_depth_b=1024 c_read_width_a=8 c_read_width_b=8 c_sim_collision_check=ALL
c_sinita_val=0 c_sinitb_val=0 c_use_byte_wea=0 c_use_byte_web=0
c_use_default_data=1 c_use_ecc=0 c_use_ramb16bwer_rst_bhv=0 c_wea_width=1
c_web_width=1 c_write_depth_a=1024 c_write_depth_b=1024 c_write_mode_a=WRITE_FIRST
c_write_mode_b=WRITE_FIRST c_write_width_a=8 c_write_width_b=8
Core Type=blk_mem_gen_v2_8
c_addra_width=10 c_addrb_width=10 c_algorithm=0 c_byte_size=9
c_common_clk=0 c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0
c_has_ena=1 c_has_enb=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_ssra=0 c_has_ssrb=0 c_init_file_name=blk_mem_8x1024_2.mif c_load_init_file=1
c_mem_type=0 c_mux_pipeline_stages=0 c_prim_type=3 c_read_depth_a=1024
c_read_depth_b=1024 c_read_width_a=8 c_read_width_b=8 c_sim_collision_check=ALL
c_sinita_val=0 c_sinitb_val=0 c_use_byte_wea=0 c_use_byte_web=0
c_use_default_data=1 c_use_ecc=0 c_use_ramb16bwer_rst_bhv=0 c_wea_width=1
c_web_width=1 c_write_depth_a=1024 c_write_depth_b=1024 c_write_mode_a=WRITE_FIRST
c_write_mode_b=WRITE_FIRST c_write_width_a=8 c_write_width_b=8
Core Type=blk_mem_gen_v2_8
c_addra_width=10 c_addrb_width=10 c_algorithm=0 c_byte_size=9
c_common_clk=0 c_default_data=0 c_disable_warn_bhv_coll=0 c_disable_warn_bhv_range=0
c_has_ena=1 c_has_enb=0 c_has_mem_output_regs_a=0 c_has_mem_output_regs_b=0
c_has_mux_output_regs_a=0 c_has_mux_output_regs_b=0 c_has_regcea=0 c_has_regceb=0
c_has_ssra=0 c_has_ssrb=0 c_init_file_name=blk_mem_8x1024_3.mif c_load_init_file=1
c_mem_type=0 c_mux_pipeline_stages=0 c_prim_type=3 c_read_depth_a=1024
c_read_depth_b=1024 c_read_width_a=8 c_read_width_b=8 c_sim_collision_check=ALL
c_sinita_val=0 c_sinitb_val=0 c_use_byte_wea=0 c_use_byte_web=0
c_use_default_data=1 c_use_ecc=0 c_use_ramb16bwer_rst_bhv=0 c_wea_width=1
c_web_width=1 c_write_depth_a=1024 c_write_depth_b=1024 c_write_mode_a=WRITE_FIRST
c_write_mode_b=WRITE_FIRST c_write_width_a=8 c_write_width_b=8