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IP명 Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme
Category Mixed Application 신호처리
실설계면적 4㎛ X 4㎛ 공급 전압 1.2V
IP유형 Hard IP 동작속도 20MHz
검증단계 Silicon 참여공정 SS65-2002
IP개요 This paper presents an adaptive match-line (ML)
discharging scheme for low power and high speed ternary content
addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the
redundant ML discharging and SL switching are eliminated while
improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results
using Cadence design tool with the 65nm CMOS technology show
that the proposed adaptive ML discharging scheme improves up
to 19% of sensing delay and saves 81% of ML power compared to
the conventional approach.
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