| IP개요 |
A fully integrated 250 GHz CMOS transceiver front- for B5G and 6G communications is presented. The proposed CMOS transceiver is composed of a high output power LO chain, high output power wideband PAs with high efficiency, high gain wideband LNA with low power consumption, fundamental I/Q mixer, and wideband baseband amplifiers. In this paper, the TRx architecture adopts direct conversion topology with proposed mixer sharing architecture. As sharing the mixer, LO power could be boosted to 3 dB which will improve the mixer performance. The wideband PA and LNA adopt differential Gmax-core with dual-peaking technique. LO chains are composed of D-band PLL with doubler. Using doubler, LO chains achieve high power and high efficiency. |
