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(채용) Synopsys Korea 인재채용 2023.10.05. 13:08
정재희 (gr****)  

 반도체 설계 자동화(EDA: Electronic Design Automation)분야 세계 1위 기업인 Synopsys Korea에서 역량있는 인재를 찾고 있습니다

Synopsys "Smart Everything, From Silicon to Software" 란 비전 아래 반도체 관련 다양한 사업을 진행하고 있으며 무한한 발전 가능성과 합리적인 기업 문화를 가진 Synopsys와 함께 반도체 설계 분야의 전문가로 성장하고자 하는 인재분들께 늘 열려있습니다.

 특히 Synopsys Korea는 원래 경력 위주의 채용이다보니 대부분 대기업 근무경력이10년 이상인 분들로 구성되어 있어 잘 지도해 주실 멘토분들이 많고 IP업계 1위 업체이다 보니 제반 Infra가 국내 대기업에 비교할 수 없을 정도로 잘 구축되어 있습니다

이번 채용은 국내 비메모리 반도체 설계 역량 강화 차원에서 경력 요건을 다소 완화하여 석박사 인력에게 더 많은 기회를 제공하고자 하였습니다잠재 역량과 열정 가득한 분들의 많은 지원 바랍니다.


At Synopsys, were at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And were powering it all with the worlds most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoCfaster. We offer the worlds broadest portfolio of silicon IPpredesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

1. 모집분야

 : A&MS Circuit Design Engineer, Senior or Junior


2. Role & Responsibilities

     ● Ensure analog sub-block performance adheres to SerDes standards and architecture document specifications.

     ● Identify and refine circuit implementations to achieve optimal power, area, and performance targets.

     ● Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design.

     ● Oversee physical layout to minimize the effect of parasitics, device stress and process variation.

     ● Collaborate with digital RTL engineers on the verification of calibration, adaptation and control algorithms for analog circuits.

     ● Present simulation data for peer and customer review.

     ● Ownership of analog and mixed-signal building block that is integrated as part of a larger SerDes design.

     ● Document design features and test plans.

     ● Consult on the electrical characterization of your circuit within the SerDes IP product.


3. 자격요건(Key Qualifications)

     ● Ph.D. with 1+ years, or MSc with 1+ years of SerDes/High-Speed analog design experience.

     ● Familiarity with the transistor-level circuit design of fundamental analog and mixed-signal building blocks- sound CMOS design fundamentals.

     ● Silicon-proven experience implementing circuits for analog and mixed-signal building blocks

     ● Design experience with some of the following SerDes sub-circuits:

     ● receive equalizers, data samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase interpolator, delay-locked loop, phase-locked loop, bandgap reference, ADC, DAC

     ● Experience optimizing CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects.

     ● Awareness of ESD issues (i.e. circuit techniques, layout). and design for reliability (i.e. electro-migration, IR, aging, etc.).

     ● Experience with EDA tools for schematic entry, physical layout, and design verification.

     ● Knowledge of SPICE simulators and simulation methods.

     ● Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.

     ● Experience with TCL, Perl, C, Python, MATLAB.


Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.


4. 지원방법 및 문의

  : 영문 이력서 첨부하여 e-mail 지원 (cheono.lee@synopsys.com)