SYNOPSYS | KOREA

SERDES ANALOG DESIGN ENGINEER

Shape the future of high-speed connectivity.

ENGINEERING SOLUTIONS — FROM SILICON TO SYSTEMS

PERVASIVE INTELLIGENCE | HIGH-PERFORMANCE SILICON | SILICON-PROVEN IP

THE OPPORTUNITY

Own high-performance analog & mixed-signal building blocks for next-generation SerDes IP — from transistor-level design and verification to physical implementation and silicon characterization.

DESIGN. OPTIMIZE. DELIVER.

• Drive SerDes analog sub-block performance to meet architecture and standards requirements
• Optimize POWER · PERFORMANCE · AREA with efficient verification strategies
• Own key blocks: RX EQ · SAMPLER · TX DRIVER · PLL/DLL · VCO · PI · ADC/DAC · REFERENCES
• Guide CMOS layout with careful consideration of parasitics · mismatch · device stress · process variation
• Partner with digital RTL engineers on calibration · adaptation · control algorithms
• Take designs through review, implementation, and silicon electrical characterization

WHAT YOU BRING

• M.Sc. or Ph.D. degree in electrical/electronic engineering or a related field, with experience in SerDes or high-speed analog design
• Strong fundamentals in transistor-level analog & mixed-signal circuit design
• Silicon-proven circuit implementation experience
• Experience with CMOS layout optimization and awareness of reliability considerations: ESD · EM · IR · AGING
• Hands-on experience with schematic design, layout, verification, and SPICE simulation
• Experience with Verilog-A and scripting/programming languages such as Tcl · Perl · C · Python · MATLAB

INNOVATE. CONNECT. TRANSFORM.

Empower innovators to drive human advancement.

Join Synopsys Korea and help advance high-speed interface IP for the next generation of intelligent, high-performance silicon.

SYNOPSYS KOREA · SEONGNAM, KOREA

- 접수기간 : ~2026.12.30까지

- 제출 서류 : 영문이력서 및 성적증명서

- 지원 방법 : 이메일 접수(담당자 : 이천오 상무 / cheono.lee@synopsys.com )

※ 채용 관련 상세 사항은 위 담당자(이천오 상무) 이메일로 문의해 주시기 바랍니다.