Design of 35 GHz Sub-Harmonically Injection Locked Multiplying Delay Lock Loop Using 65-nm CMOS Technology 2022.05.04. 20:23 Dong Yeol Yang 논문번호 : 202203024 주저자 : Dong Yeol Yang 소속 : Sungkyunkwan University 지도교수 : 김병성 전시담당자 : Dong Yeol Yang(dyyang95@g.skku.edu) 포스터 : 댓글 0 ↓
Dong Yeol Yang
