| IP명 | Design of Reference-Less Position Integral Frequency Detector Clock and Data Recovery Circuit for Fast &Wide-Range Clock Acquisition | ||
|---|---|---|---|
| Category | Mixed | Application | Memory |
| 실설계면적 | 4㎛ X 4㎛ | 공급 전압 | 1V |
| IP유형 | Hard IP | 동작속도 | 8GHz |
| 검증단계 | Simulation | 참여공정 | SS28-2101 |
| IP개요 | Design of Reference-Less Position Integral Frequency Detector Clock and Data Recovery Circuit for Fast &Wide-Range Clock Acquisition | ||
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