| IP명 | Design and Optimization of Low-Noise Signal Interface Circuit with Minimized Reflection | ||
|---|---|---|---|
| Category | Analog | Application | Iot, communication |
| 실설계면적 | 5㎛ X 2.42㎛ | 공급 전압 | 5V |
| IP유형 | Hard IP | 동작속도 | 2.4GHz |
| 검증단계 | Silicon | 참여공정 | DB180-2401 |
| IP개요 | Passive Inductor Device-level MOSFET Device-level enclosed-layout transistor Circuit-level enclosed-layout transisto OPAMP using ELT |
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