| IP명 | Cost-efficient Graph Neural Network Accelerating System with Die-to-die Interconnection | ||
|---|---|---|---|
| Category | Mixed | Application | Graph Neural Network acceleration |
| 실설계면적 | 2556㎛ X 1957㎛ | 공급 전압 | 1V (Core VDD), 1.8V V |
| IP유형 | Hard IP | 동작속도 | 50MHz |
| 검증단계 | Silicon | 참여공정 | SF028-2401 |
| IP개요 | Scalable Graph Neural Network accelerator | ||
- 레이아웃 사진 -
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