| IP명 | Automotive Radar Frontend Circuit in 0.13um CMOS | ||
|---|---|---|---|
| Category | Analog | Application | Radar |
| 실설계면적 | 0.7㎛ X 2.2㎛ | 공급 전압 | 0.95V |
| IP유형 | Hard IP | 동작속도 | 24GHzHz |
| 검증단계 | Simulation | 참여공정 | SS65-1602 |
| IP개요 | - At 24GHz for automotive collision avoidance radar application. - Composed of a two-stage LNA and downconversion mixers. - The LNA stage is adopted complemenptary push-pull (CPP) topology to boost the gain and the linearity of whole circuit. - The LNA was realized in folded configuration to reduce power supply and to increase voltage headroom. |
||
|
- 레이아웃 사진 -
|
|||