| IP명 | A capacitively coupled CTDSM for sensor readout ICs | ||
|---|---|---|---|
| Category | Analog | Application | ADC, sensor applications |
| 실설계면적 | 5㎛ X 5㎛ | 공급 전압 | 1.8V |
| IP유형 | Hard IP | 동작속도 | 320kHz |
| 검증단계 | Silicon | 참여공정 | HM-2001 |
| IP개요 | This study presents a sensor readout IC using a capacitively coupled instrumentation amplifier-embedded continuous-time delta-sigma modulator. As the frequency translation effect of chopping and the RRL have a severe side effect, we suggest practical circuit configurations to eliminate chopping artifacts, using chopping frequency as the sampling frequency. The fabricated chip is implemented in 180-nm CMOS technology, and it is able to read out both DC and AC signals. | ||
- 레이아웃 사진 -
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