| IP명 | A Cryo-CMOS Loop-Unrolled SAR ADC for Qubit Readout | ||
|---|---|---|---|
| Category | Analog | Application | Data Converter |
| 실설계면적 | 3㎛ X 1㎛ | 공급 전압 | 1V |
| IP유형 | Hard IP | 동작속도 | 1GHz |
| 검증단계 | Silicon | 참여공정 | HM-2501 |
| IP개요 | This design aims to design a high-speed ADC for quantum computing qubit readout circuits. With a core size of 1080 μm x 1580 μm, a 1V supply voltage, and a 77K environment, the post-layout simulation results show a single-channel ADC reference SNDR of 45.97 dB and an ENOB of 7.34 bits with foreground calibration applied. | ||
- 레이아웃 사진 -
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