| IP명 | Offset Reduction of Latch NMOS Mismatch in Current-Latched Sense Amplifiers Using Dummy and Coupling Capacitors | ||
|---|---|---|---|
| Category | Mixed | Application | Memory |
| 실설계면적 | 4㎛ X 4㎛ | 공급 전압 | 1V |
| IP유형 | Hard IP | 동작속도 | 100MHz |
| 검증단계 | Silicon | 참여공정 | SS028-2502 |
| IP개요 | Overall results show that DC-CLSA and CC-CLSA are suitable solutions for various applications including SRAM SAs, IOSAs, and comparators. This evaluation will serve as a critical step in validating the simulation results and confirming the practical benefits of the proposed designs | ||
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