| IP명 | SRAM In-Memory Computing | ||
|---|---|---|---|
| Category | Mixed | Application | Memory |
| 실설계면적 | 4㎛ X 4㎛ | 공급 전압 | 1V |
| IP유형 | Hard IP | 동작속도 | 900MHz |
| 검증단계 | Silicon | 참여공정 | SS028-2601 |
| IP개요 | Unlike prior 6T-SRAM-based IMC architecture, it eliminates the need for an external accumulator, which can introduce additional computing overhead. And when compared to prior MRAM-based ToBNN-IMC design, it demonstrates higher accuracy and is expected to achieve significantly higher accuracy as the number of MAC operations increases. |
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- 레이아웃 사진 -
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