| IP명 | A High-Density and Energy-Efficient Systolic Array-Based DNN Accelerator with eDRAM-Based Near-Memory Partial Computing | ||
|---|---|---|---|
| Category | Mixed | Application | Systolic Array-Based DNN Accelerator |
| 실설계면적 | 4㎛ X 4㎛ | 공급 전압 | 1.8V |
| IP유형 | Hard IP | 동작속도 | 200MHz |
| 검증단계 | Silicon | 참여공정 | SF028-2601 |
| IP개요 | This work proposes a systolic array-based DNN accelerator that integrates eDRAM-based near-memory partial computing to achieve higher density and energy efficiency. |
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- 레이아웃 사진 -
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