| IP명 | Implementation of Efficient On-chip Power Converters | ||
|---|---|---|---|
| Category | Analog | Application | Power Converter |
| 실설계면적 | 4㎛ X 4㎛ | 공급 전압 | 1.0, 1.8V |
| IP유형 | Hard IP | 동작속도 | 20GHz |
| 검증단계 | Silicon | 참여공정 | SF28-2301 |
| IP개요 | [Implementation of Efficient On-chip Power Converters] 1. PMIC unit 2. Load stacking structure 3. LDO regulator 4. LDO regulator (slew enhanced) 5. PLL |
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