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IP명 Low Noise Chopper Multipath Amplifier with 129 dB Ripple Rejection using Floating High-Pass Filter and DC Servo Loop
Category Analog Application 연구
실설계면적 3.8㎛ X 3.8㎛ 공급 전압 3.3V
IP유형 Hard IP 동작속도 10MHz
검증단계 Silicon 참여공정 MS180-1903
IP개요 This paper presents a low noise chopper multipath amplifier using floating high-pass filter (HPF) and DC servo loop for microsensor interface circuits. Low noise characteristics are highly required in high performance sensor interface circuits. Reducing offsets and flicker noise by chopper stabilization technique is a common approach to gain low noise characteristics. The output ripple caused by the chopper up-modulation can be suppressed by a ripple reduction loop (RRL). However, the overall bandwidth is limited by implementing chopper stabilization technique. A multipath amplifier scheme is a solution for gaining wide bandwidth. The proposed chopper multipath amplifier scheme is implemented with a floating HPF and a DC servo loop (DSL) with passive low-pass filter (LPF) for fast common mode tracking and high ripple rejection. The RRL of the proposed scheme is implemented with floating HPF and a passive DSL without an additional amplifier. The multipath amplifier achieves offset rejection ratio of 129.32 dB and common mode rejection ratio (CMRR) of 120.16 dB, by simulation results. The multipath amplifier is designed in standard 0.18 μm 1P6M CMOS process. It operates at 150 μW with a 1.8 V supply and has an input referred noise with implementing floating HPF and passive DSL is 32 nV/√Hz in the bandwidth from 0.01 Hz to 100 kHz.
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