IP명 | Pre-charge 스위치와 이진-가중치 전류 DAC를 사용한 고정밀 SNN 아날로그 시냅스 회로 | ||
---|---|---|---|
Category | Analog | Application | analog circuit |
실설계면적 | 4㎛ X 4㎛ | 공급 전압 | 1.2V |
IP유형 | Hard IP | 동작속도 | 1GHz |
검증단계 | Silicon | 참여공정 | SS65-2002 |
IP개요 | synapse circuit using a pre-charged switch and a binary-weighted current DAC. The proposed synapse circuit achieves stable and high resolution and reduces the area by replacing a capacitor with binary-weighted current DAC. In addition, the unwanted switching current error is reduced by 73% by adding a pre-charged switch to the circuit |
||
- 레이아웃 사진 - |