| IP명 | A 4.2 V Input High Power Conversion Efficiency Step-Down Hybrid Converter | ||
|---|---|---|---|
| Category | Analog | Application | PMIC |
| 실설계면적 | 5㎛ X 5㎛ | 공급 전압 | 4.2V |
| IP유형 | Hard IP | 동작속도 | 1MHz |
| 검증단계 | Silicon | 참여공정 | HM-2203 |
| IP개요 | This proposal presents a 4.2 V input hybrid converter that performs high-efficiency power conversion using chargebalanced flying capacitor and 1.8 V CMOS. By using additional SC converter stage. the inductor current is reduced, thus, the converter maintains high power conversion efficiency even with the small volume of the chip inductor. The converter operates in the continuous conduction mode, and both the hybrid stage and SC stage operate with same clock phases. The proposed converter is implemented in TSMC 180 nm GP process, operates with 1 MHz clock, and mixed signals of digital and analog circuits. |
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