IP명 | Energy-efficient AI Processor with Adaptable Online Learning | ||
---|---|---|---|
Category | Digital | Application | Adaptive online learning |
실설계면적 | 4㎛ X 4㎛ | 공급 전압 | 1.2V |
IP유형 | Hard IP | 동작속도 | 50MHz |
검증단계 | Simulation | 참여공정 | SS65-1703 |
IP개요 | AI processors can extend their practicality by having cognitive capabilities such as adaptable learning so that they can adapt to unexpected situations in-situ. Q-learning is a form of reinforcement learning and it has been efficient in solving certain class of learning problems. However, embedded systems rarely implement learning algorithms due to the constraints faced in the field, like processing power, chip size, convergence rate and costs due to the limit of the mobile environment. These challenges present a compelling need for a portable, low-power, area efficient hardware accelerator to make learning algorithms practical on mobile hardware. This work presents an energy-efficient hardware for Qlearning with Artificial Neural Networks (ANN). The architectural implementation for a single neuron Q-learning and a more complex Multilayer Perception (MLP) Q-learning accelerator has been demonstrated. The analytical results show up to a 43-fold speed up compared to a conventional Intel i5 2.3 GHz CPU. Finally, we implement the proposed architecture using the Synopsys design compiler and IC compiler using Samsung CMOS 65nm process |
||
- 레이아웃 사진 - |